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Altera_Forum
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11 years ago

Avalon MM: writedata and write

Hi, a beginner's question, when passing data from HPS to the FPGA I use the AVALON MM interface. Now I'm a bit in doubt, if it is better to check "write" and then fetch "writedata" into a reg (verilo...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Hi, thank you for answering so fast. Well, in the meanwhile I figured out, it was a timing issue: I gave an explicit "start" signal and checked then for "write", but "write" arrived before "start" due to the setup.

Still, my curiosity is rather to understand, why I should check for "write" as a signal at AVALON MM? What may happen if I don't check this?