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Altera_Forum
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11 years ago

Avalon MM: writedata and write

Hi, a beginner's question, when passing data from HPS to the FPGA I use the AVALON MM interface. Now I'm a bit in doubt, if it is better to check "write" and then fetch "writedata" into a reg (verilo...
Altera_Forum's avatar
Altera_Forum
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11 years ago

If you want your logic to retain the value that has been written for a period of time greater than the brief time when 'write' is being asserted, then yes you would want to store it in a register.

If your logic doesn't care (for example, because 'algo_in' feeds to 'algo_out' and that result gets latched), then using a wire as you have done is fine.