Avalon Memory Mapped read and write pipeline

​I assume you were thinking the implementation from slave perspective. Here are my point of views:

1) Write transfer during read pending in process.

Not sure you have read this context

"The Avalon-MM specification does not define the value of readdata in the event that a slave accepts a write transfer to the same address as a currently pending read transfer" in the same section 3.5.4.2 https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/manual/mnl_avalon_spec.pdf. There is no definition how slave handles when in situation that both read and write transfer are using the same address. So, slave is recommended to stall the transfer and complete all of pending read before executing the write transfer.

2) As you are using WaitrequestAllowance properties, I don't think you can ignore the transfer from master. Refer to section 3.5.2,

"specifies the number of transfers an AvalonMM master can issue or an Avalon-MM slave must accept after the waitrequest signal is asserted", with this statement, you have to provide a buffer at slave side to process the transfer after while asserting the waitrequest at the same time.