Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Avalon bridge question

Hi. I'm trying to build a system with address decoding in Qsys. What I want (see the picture) http://www.alteraforum.com/forum/attachment.php?attachmentid=9902&stc=1 - I want address BRAMs usin...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

--- Quote Start ---

If you are asking if there is a 4-port Avalon-MM bridge, the answer is no.

The best you can get is probably the MPFE Verilog.

Or, you can do something like instantiate 4 bridges and connect them to the same slaves (onchip memories).

You can then connect 4 masters to the bridges and then access to the memories will be arbitrated independently.

--- Quote End ---

Hi ted,

Is the arbitration automatic? How to avoid conflict?