Honored Contributorhttps://alteraforum.com/forum/attachment.php?attachmentid=15412&stc=1
Dear Developers, I am creating a code where I used memory , however there is a part of memory that I didn't actually use , it is "auto generated" called altshift taps as shown in image, Kindly I need a justification for adding it by Quartus. Many thanks.
Honored ContributorFPGA synthesis never implements any resource that isn't "actually used". I guess the problem is that you don't understand which part of the code infers a RAM based shift register. But without seeing the code, it's hard to tell.
Honored ContributorFPGA synthesis never implements any resource that isn't "actually used". I guess the problem is that you don't understand which part of the code infers a RAM based shift register. But without seeing the code, it's hard to tell.
The hierarchy view already tells you that it's used in the implementation of dataodd_rtl. There's no additional autogenerated logic, it's just the way how altshift_taps is implemented.Honored ContributorHonored ContributorThe shown code snippet doesn't give reason to expect altshift_taps inference. I guess, i's not the full picture.
Honored ContributorThere is nothing surprising here as by default the tool is made free to infer memory for some shift operations. The user can disable that in the project settings.
Honored Contributoraltshift_taps is used for multicycle shift registers. But there's no respective function in the shown code snippet.
Honored ContributorHonored ContributorThanks for reply, the only place I used that signal (dataodd) is here! How can I disable it? Regards.
Honored ContributorI don't see you have chosen the right setting.
I believe it should be something like: Auto Shift Register Recognition OFF. You can also apply it specifically to your signal using attribute.Honored ContributorI didn't notice such settings .. :(
