Forum Discussion
Altera_Forum
Honored Contributor
11 years agoAudio processor with verilog
Hi, I've been doing this project for about a year now and after so many ups and downs i've reached a point where everything seems right but warnings appear that I've got no clue how to amend. thi...
Altera_Forum
Honored Contributor
11 years agothanks for your reply.
1. I don't have an FPGA board yet. I just used the xilinx ISE to synthesize my project. the xilinx forum required me to already have the board in order to register.So I defected to altera forums! but do they differ ? verilog is verilog everywhere. 2.I made amendments in the first post and uploaded some of the modules and then some with this one. 3. the testbench result was pure XXXXXXXX...s. 4.SDP_BRAM is an IP core module. please share your idea about the other errors now that the other submodules are available to study.