Honored Contributor
Honored Contributor1. you're using XST - that is a Xilinx piece of software for compiling into Xilinx devices - this is an altera forum (xilinx's competitor)
2. you havent posted the code - all you have posted is a netlist. I dont know what half the modules are meant to do. 3. Have you got a testbench for the code? 4. The warnings are several things - Whatever SDP_BRAM is, there is no functionality inside it - hence the compiler is treating it as a black box - The warnings for mem and mem1 should be fairly self explanitory (mem and mem1 are never assigned values. And then whatever the index is outside of the range of what it's indexing into) - U7 is unconnected and will be removed from the design - The trimming warnings are because there are some signals that drive this signal stuck at '0', hence these registers are removed because they are redundant (they are also stuck at 0).
