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Altera_Forum's avatar
Altera_Forum
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11 years ago

Associating a VHDL RECORD with a buffer

I am storing some data into a array of STD. type my_array is array(0 to 7) std_logic_vector(7 downto 0); signal datain : my_array; How do I associated a record with datain? Data comes into my code and I save it into an array as follows: datain[0]

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    why not post some more code, in cotext, with what you are doing. Your topic is a little confusing as buffer is a reserved VHDL for a port type (in, out, inout and buffer). And your post shows no documentation of the record type.

  • Altera_Forum's avatar
    Altera_Forum
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    The 8-bit data comes into my code and I save it into datain. First byte goes into datain[0]. Second byte goes into datain[1]. Etc. When all 8 bytes have been put into datain I want to access these using a record such that my_rec.a

  • Altera_Forum's avatar
    Altera_Forum
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    well, you need to declare a record type with the appropriate fields.

  • Altera_Forum's avatar
    Altera_Forum
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    I am storing some data into a array of

    STDV type my_array is array(0 to 7) std_logic_vector(7 downto 0);

    signal datain : my_array;

    type my_record is record a : std_logic_vector(7 downto 0); b : std_logic_vector(7 downto 0); etc end record.

    signal header : my_record;

    How do I associated the "header" with datain? Data comes into my code and I save it into an array as follows: datain[0]
  • Altera_Forum's avatar
    Altera_Forum
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    you need to manual assign the fields:

    header.a <= datain(0);

    header.b <= datain(1);

    etc.