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Altera_Forum
Honored Contributor
19 years agoAssignment pin
Hey
I want to do the assignment pin to StratixII and I want to know what is the fastest and the best way to do it? I know that there is a way to write VHDL file with attributes, is someone know what is the format to write? and if there is format for Verilog file? Thanks, Shishko1 Reply
- Altera_Forum
Honored Contributor
you can do this in the rtl directly using chip_pin.
search for chip_pin in quartus help. here is the example from the help // Traditional comment-style syntax module foo(sel, data, o); input sel /* synthesis chip_pin = "C4" */; input [3:0] data; /* synthesis chip_pin = "D1, D2, D3, D4" */; output o; // Specify module body endmodule // Verilog-2001 attribute syntax module foo(sel, data, o); (* chip_pin = "C4" *) input sel; (* chip_pin = "D1, D2, D3, D4" *) input [3:0] data; output o; // Specify module body endmodule --dalon