Forum Discussion
Altera_Forum
Honored Contributor
18 years agoAnything that small will be IO limited in a Standard Cell, so it probably doesn't matter. There is no 1:1 correlation though. An ALUT could be a large XOR gate, which would be a lot of gates, or it could be a 2 input AND gate. So it's really tough to correlate the two until you start porting your code to the ASIC library. What are you trying to target? (Not necessarily vendor, but what technology, etc.?)