Forum Discussion
TG_GER
New Contributor
2 years agoHi,
Thank you for the prompt response.
The problem is, I am unable to utilize the external DDR RAM (4GB) as it is connected to the FPGA side. While I can configure the RAM with early IO release, the peripheral from the early IO is larger than 256k (SDRAM size). Consequently, I am unable to retrieve it from TFTP to RAM and then transfer it to the FPGA. Saving the configuration part on the hardware protection SD card poses a challenge as I can never perform a config update since the peripheral and core config must be from the same build.
Do you have any other ideas on how to resolve this issue?
Kind regards,
TG