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Altera_Forum
Honored Contributor
11 years agoYou need to look at everything that can cause the FPGA to go into configuration mode. One possibility is the internal power-on reset (POR) circuit. This circuit monitors several of the FPGA power rails. If any rail drops drops below a fixed threshold the POR circuit will be triggered and will put the FPGA back into the power-up reset state. If that power rail then recovers the internal reset will be released and configuration will commence, just like what happens on power-up. That would be my best guess as to what's going on. Read the Arria II documentation to see exactly what power rails are monitored and what the thresholds are. If you rule this one out then look at the other possibilities. There aren't that many.