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Altera_Forum
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12 years ago

Arria II. Load Image with FPP Protocol. Nstatus stuck low ?!

Hello. I have an FPGA board with an Altera II connected to a Cypress bridge. I have written a firmware for the bridge in order to load the FPGA image with the FPP protocol (all 4 MSEL low)...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

nSTATUS goes low during configuration if the FPGA does not like the data you are sending.

Have you confirmed that you can program the FPGA using JTAG?

Here's some notes on Passive Serial and Fast Passive Parallel programming. Read through them. Perhaps you will see something useful:

http://www.ovro.caltech.edu/~dwh/carma_board/fpga_configuration.pdf

Cheers,

Dave