Arria II GX high speed transcievers PCB design

I am designing an FPGA board with an Arria II GX on it.

I need to use the high speed transceivers to send data

at around 4 Gbps.

I will build a second FPGA board to receive this data through

an external connector where it will then be routed into

the FPGA and then be deserialized.

Can anybody give me some ideas about how to determine

what the electrical interface will look like to do this?

I know that these will be using differential pairs.

Obviously we are not talking about LVDS - it is something different.

Where can I find information about what I need to do as far as circuit design is concerned?

Also, what do I need to know about signal integrity of

the connectors and inter board routing cables.

Can I use a coax or a flex circuit? Differential coax cable?

What does the characteristic impedance of the PCB traces and

associated connectors and cables need to be?

Does anybody have experience with this?

Is there are reference design that does something like what I want to do?

Thanks!