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David32's avatar
David32
Icon for Occasional Contributor rankOccasional Contributor
2 years ago
Solved

Arria 10 HPS EMIF DDR4 failing calibration

Hi, We are using Arria 10 SOC on a custom board. There is a single interface to DDR4 (component, 2 devices, each 16 bits). When doing normal EMIF the calibration succeeds and I can access memory t...
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  • David32's avatar
    David32
    1 year ago

    Hi Sho,

    I am sorry but I forgot to mark this thread as solved.

    We found it necessary to mark (within HPS configuration in QSYS) that FPGA boots from SD card.

    Thanks

    David

David32's avatar
David32
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Hi Sho,

Yes that is correct.

Two things are working when using a non-HPS EMIF controller:

1. EMIF toolkit. I manage to create eye diagrams, do re-calibration, etc. Everything seems OK (except for running TG - which I think is more a compatibility issue within Intel since it seems that TG is not supported with Arria 10)

2. From within System Console via JTAG master I can read/write the DDR4 successfully.

In a different project I use now instantiate a HPS EMIF controller, along with HPS etc.

Here the boot software always reads from the CALSTAT register that calibration is failing.

David