Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Arria 10 GX pcie and xaui transceiver interaction

Hello, I am seeing something that I cannot understand from the transceiver user guide. Arria 10GX with 12 tranceiver channels. Of the 12 XCVR channels, I have one x4 PCIe Gen 3 HARD IP and 4 ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Where is your pll_ref_clk coming from in each of the cases you mention? Is that clock there when the board is not plugged into the PCIe slot?

Cheers,

Alex