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Altera_Forum's avatar
Altera_Forum
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14 years ago

array support

Hi, is there a possibility to define an VHDL array so, that in an EPC3C55 the array uses the internal RAM cells. Actually the array uses only the logic elements. Thanks best Jo
Altera_Forum's avatar
Altera_Forum
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14 years ago

In order for the array to be synthesized into RAM blocks, it needs to meet the HDL template.

If your code is recognized by Quartus as such or if you are describing a behavior that can't be implemented by the M9K blocks, Quartus will not infer RAM and use logic elements instead.

If the problem is the later, Quartus might be giving you a warning.

See the coding guidelines.

http://www.altera.com/literature/hb/qts/qts_qii51007.pdf