Forum Discussion
ContributorArial10 Power-Up Calibration Clock Question
Hi @xytech
Calibration starts during configuration.
No timing sequence, the time for calibration to complete vary by device.
Based on experience, faster configuration time is needed if you are designing for open-system to meet the 100ms. For closed-system, you can adjust the PERST to allow more time.
Hope this helps.
Contributorcopy from other post. reocorded here.
The total configuration timing sequence is;
1) External power gets turned on to the "system"; motherboard or chassis, main host CPU, and PCIe bridges and devices.
2) The power supplies for the host and the peripheral devices start ramping up. The timing for this part is completely arbitrary and depends on the system design. In the case of your FPGA-based PCIe end-point, you'll have whatever ramp time your power supplies require, and if you've specified a fast POR, they need to ramp within that time.
3) Once the power supplies are in spec, the FPGA configures, eg., via Active Serial, Passive Serial, or Fast Passive Parallel.
4) The BIOS or host CPU bootloader enumerates the PCIe bus. So long as (3) completes before (4), your system will work, otherwise it will not, as the PCIe device will not be enumerated.
