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relsaar's avatar
relsaar
Icon for New Contributor rankNew Contributor
5 years ago

Aria V Display Port core sometimes disconnected

Hi All We have a PCB board we designed with AMD 8860 GPU that sends DP video to Aria V Display Port core (Qsys). In some of our boards we sometimes have DP connection issues. The video signal goe...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


I managed to go back office today (despite bad COVID situation) to run some hardware testing and found out v15.0 example design indeed is problematic, likely due to some old known issue bug as I explained to you in my previous post.


I validated v18.0 and v20.1 Quartus Standard example design and it's working.

  • I can see video output and in NIOS II terminal, just press "s" key or push button 0 then it will dump MSA log
  • You won't see the all zero value in MSA log anymore


I will generate Intel SFTP server and share the v20.1 example design zip file with you. You can try out the sof file in the zip file directly on your AV starter kit board.


Thanks.


Regards,

dlim