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relsaar's avatar
relsaar
Icon for New Contributor rankNew Contributor
5 years ago

Aria V Display Port core sometimes disconnected

Hi All We have a PCB board we designed with AMD 8860 GPU that sends DP video to Aria V Display Port core (Qsys). In some of our boards we sometimes have DP connection issues. The video signal goe...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Additional note - you may want to cross check to ensure example design QSYS NIOS II clock and reset is supplied correctly.


Thanks.


  • relsaar's avatar
    relsaar
    Icon for New Contributor rankNew Contributor
    5 years ago

    Hi,

    I tried to download the NIOS 2 elf file and got an error (see attached).

    then I checked the address of the example design Vs my modified example design and realized the address were changed during the modification process.

    I think this is the root cause for NIOS load failure - I'll try to change back the address but if it will faile I'll need to create a new elf - can you please address me to suitable userguide?

    by the way I'd like to verify if the AUX signal integrity is cauing the MSA drop, is there any option to redundent the AUX channel in the DP setup GUI?

    thanks

    Ariel