Forum Discussion

relsaar's avatar
relsaar
Icon for New Contributor rankNew Contributor
5 years ago

Aria V Display Port core sometimes disconnected

Hi All We have a PCB board we designed with AMD 8860 GPU that sends DP video to Aria V Display Port core (Qsys). In some of our boards we sometimes have DP connection issues. The video signal goe...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


Don't use quartus_sh command to execute runall.tcl script in NIOS II terminal


Use below command instead then it should works.

  • source runall.tcl


Let me know if you still face issue in generating the example design then I will generate and share it with you via Intel FTP server. The example design file size is quite big (~300MB). Hence, can't be shared as file attachment in this forum community.


I won't recommend to jump into debugging board SI issue until we verify it using MSA log from DP example design.


Thanks.


Regards,

dlim



  • relsaar's avatar
    relsaar
    Icon for New Contributor rankNew Contributor
    5 years ago

    Hi dlim

    I managed to create and compile successfully the example project. since my PCB has only one lane of DP Rx I had to make some changes and customize the example design. attached are updated top.v, pinout table and Qsys GUI settings.

    Also since we don't have an external Bidirectional buffer on the board I added "arriav_io_ibuf" internally (see aux_buf_iobuf_bidir_nho_i at top.v) - in my legacy design we also used Bidirectional buffer on those signals.

    Finally I created a SignalTap with some signals to verify if the example design gets any input video signal.

    The design was compiled without any errors but it looks like the display port Rx does not receive any signal since there is no MSA lock (only occasional negative pulses on Rx Aux In - see attached image)

    when I program my legacy design I get steady msa lock most of the time and I'm using the same application to configure the GPU to generate same DP signal. Can you please help me find out what is wrong?

    • did I forget any important pin assignment or pinout?
    • did I change any settings that disrupted the design to receive DP?

    Please let me know if you need more data.

    Thanks

    Ariel

    • relsaar's avatar
      relsaar
      Icon for New Contributor rankNew Contributor
      5 years ago

      Hi dlim

      Also when running the example design, I opened the NIOS shell command and type "s" as you instructed, unfortunately it was not recognized as a valid command (see attached image)

      Please advise if there was precursory action that I had to perform before typing "s"?

      Thanks

      Ariel