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Altera_Forum
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15 years ago

Are these Verilog statements synthesized as parallel HW?

Hi, I have 32 different 32 bit- registers where I need to add the numbers of ones in each of them in parallel, to simplify : begin A = R1[0] + R1[1] + R1[2] ....... + R1[31]; B = R2[0...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Thanks for your prompt reply :)