Are there any issues in sim models of ALT_LVDSRX with DPA?

I have a simple simulation env where I send a constant pattern serially to the ALT_LVDSRX w/DPA instantiation in my design. I see that the DPA has locked. But then every 150 or so pixel clocks, it looks like the DPA phase is readjusted. I do not vary any thing in the test bench so this puzzle me? The test pattern I send is also a 14 bit stream of 1010. So there are more than 256 transitions for the DPA to lock.

Any one have experience with this and can shed some light?

Thank you in advance.

Best regards,

Sanjay