Are the LVDS terminations react on Pins in which no signal pass ?

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You can observe that Quartus doesn't place a LVDS input without a respective input port. Do you say, the termination isn't connected although the pin is defined as input port, but not driving actual logic? Which FPGA family?

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Yes, that's exactly what I meant.

FPGA Family : Cyclone V GX C5 F27 Grade 7

Manufacturer Part Number - 5CGXFC5C6F27C7N.