Are LVDS SERDES constrained to only the IOPLL of the same bank?

I am targeting an Arria 10 SX 660 (10AS066H1F34I1HG). Is it feasible to utilize an IOPLL in an adjacent bank to clock the SERDES in another? For example SERDES in 3F and IOPLL in 2J. The tools seem to indicate that it is not possible (Quartus 18.0) and report "Error (175006): Could not find path between the IOPLL and destination LVDS_CLOCK_TREE"