Forum Discussion
Altera_Forum
Honored Contributor
15 years agoAnyone succesfully produced a TDC design
Hi folks, I have been trying to achieve a TDC design that can give me time measurements in the 10's of ps, so far the best i have is in the many 100's ps. The synthesis seems to alternate ...
Altera_Forum
Honored Contributor
15 years agoIn a previous post, mart_raf referred to a publication of carry chain TDC implemented with Altera FPGA. He also reported to got it finally working.
http://www.alteraforum.com/forum/showthread.php?t=4705 Personally I did some tests with lcell_comb primitive, not related to TDC. But as far as I remember, it could be used to access the carry chain. Assignment of LUT inputs dataa to datad is however mostly ignored by Quartus, apparently due to timing constraints or routing resource conflicts. But it can work in special cases, as recently reported. Did you find a way to assign the LUT inputs obligatory? http://www.alteraforum.com/forum/showthread.php?t=27284