Honored ContributorHello every body;
During the analysis and optimization of my project on Quarts 12, I found that there are some registers are removed and the reason are " Stuck at GND due to stuck port data_in ", how can I prevent Quartus to remove these register. Thanks
Honored ContributorHonored ContributorAs I just replied in the other thread, this occurs when a register is stuck at a specific value. Have you forgotten to connect a clock? or connected a clock enable to '0'?
You can use the SYN_KEEP attribute to prevent it removing registers, but this is onyl for register you KNOW this message will occur for (like when you're putting in logic you only want connected to signaltap.Honored ContributorThanks Mr Tricky for your reply
My Register instance like This process(clk) begin if reset='0' then sIn <= (others => (others => x"00")); elsif rising_edge(clk) then sIn <= state_In; end if; end process;Honored ContributorWell, theres a simulation bug in that reset is not in the sensitivity list.
But this code tells us nothing for synthsis. What are clk and reset connected to? holding reset at '0' will also remove the register.Honored Contributorclk and reset signals are exported and not connected to other signals. unless the system in a simulation phase, they connected to a generated clk and reset brought to high.
Honored ContributorIf clk and reset are not connected to something (like a pin) then that is why the register is removed.
Honored ContributorOh..
I found that I tied the input data to a const vector, I export the input data port and the register merging removed, thanks Mr Tricky. But I didn't get the path timing yet, I need your help in it.
