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Altera_Forum
Honored Contributor
8 years agoAM transmitter behaves weird (Cyclone II)
Hello. I tried to make AM transmitter and I got petty wird behavior. This code, which I post here was the only one I got working. Problems start appearing when I change div2(17) or div2(13) to any o...
Altera_Forum
Honored Contributor
8 years agoThe below code is counting rising clock edges in a simulation, by working of the sensitivity list. When trying to synthesize it in hardware, the sensitivity list is ignored and it doesn't work as a counter.
process (clk)
begin
if clk='1' then
count <= count +1;
end if;
end process; To achieve consistent behavior in functional simulation and synthesis, you need to write process (clk)
begin
if rising_edge(clk) then
count <= count +1;
end if;
end process;