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Altera_Forum
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14 years ago

altremote_update - cold-start issue

Hi, I'm having some problems with the altremote_update core on a Cyclone III FPGA. ===# 1 === - reconfiguration from application offset (0x080000) after cold-start of the system does not...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

The PLL is not an issue. I use it, too

I'm concerned about those 3 minutes

With a 25MHz clock and maximum wd timer I calculate you should get about a 21sec timeout.

Try with a longer reset cycle time or with a shorter timeout value different from all 1