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kikoss's avatar
kikoss
Icon for Occasional Contributor rankOccasional Contributor
2 years ago
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ALTLVDS TX IP - pin location constraints

Hello I Instantiated on my design an ALTLVDS TX module for agilex7 , and the compilation passed This ALTLVDS TX module output 4 differential ports (configured to 192Mbps each one ) + 1 diffe...
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  • FvM's avatar
    FvM
    2 years ago

    Hi,
    did you assign LVDS IO standard? Did you try to assign explicite pin locations for differential pairs? You only need to assign positive pins, negative pin will be assigned by fitter automatically.

AqidAyman_Altera's avatar
AqidAyman_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

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