ALTLVDS_RX->LVDS serdes Link Training

--- Quote Start ---

Agreed. I assumed the OP was using a high-speed image sensor because he mentioned a sync channel. I've been working with high-speed image sensors for many years now and most of them come with shockingly incomplete data sheets. I designed one sensor interface without DPA but I didn't do it by closing timing. That would have been impossible due to lack of detailed enough timing specs in the sensor data sheet. Instead I designed a state machine that performed a bit timing calibration by cycling through all 8 phases of the sampling clock and observing the parallel data out of the ALTLVDS_RX blocks to determine the optimal clock phase for sampling the data. The timing would drift during operation and we would start getting errors, so ended up having to re-calibrate the interface every video frame during the dead time between frames.

--- Quote End ---

You could be quite right, I overlooked the Sync channel, which very probably indicates the OP is interfacing to an image sensor.

The OP could use the input buffer dynamic delay chain in Cyclone V to align the incoming data-stream.