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Altera_Forum
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9 years ago

ALTLVDS_RX->LVDS serdes Link Training

Implementing Receiver interface. From transmitter we have 8 LVDS data channel and 1 LVDS sync channel. From sync channel we use to get training pattern which will be available in data channel for lin...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

I am using Cyclone V:5CGTFD7D5F27C7 device. I am not able to make make ALTLVDS_RX's DPA setting enabled. Then what logic need to implement to take care for bit alignment? What will be output of ALTLVDS_RX for 8 bit parallel data? That will be not bit aligned from incoming serial data? Please let me know what else need to do to make work in non-DPA Rx mode? If DPA setting is disable in Device, can we consider that DPA is supported default.