Altera SOFT LVDS 15.0 problem

Hi. I trying to attach Aleta SOST LVDS to my project, but I have next error:

Error (15065): Clock input port inclk[0] of PLL "lvds_tx:u17|lvds_0002:lvds_inst|lvds_tx_pll" must be driven by a non-inverted input pin or another PLL, optionally through a Clock Control blockWhen I trying to fix it, I find next warning:

Warning (10036): Verilog HDL or VHDL warning at lvds_0002.v(561): object "dffe19a" assigned a value but never read

I think this is a reason of my problem. Please help me to fix it. Thank you