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11 years agoAltera PLL Reconfig + Attera PLL = don't work
Hello all. I use Quartus 13.1. And DE1-SoC board with 5CSEMA5F31C6N.
I need to dynamicly phase shift output clocks from PLL so, I make Qsys system with Altera PLL Reconfig and Altera PLL, and some PIO. I generate system and write code in Eclipse for NiosII, but phases don't shift, and reading from Altera PLL Reconfig registers don't work. I don't know where i'am make a mistake... P.S. Altera PLL - Enable dynamic reconfiguration of PLL is on P.S. clk_0 = 50MHz
# include "system.h"# include "alt_types.h"# include "io.h"
//#include "define.h"
# define MODE_REG 0x00
# define STATUS_REG 0x04
//#define STATUS_REG 0x01
# define START_REG 0x08
//#define START_REG 0x02
# define DPS_REG 0x18
//#define DPS_REG 0x06
# define KEY0 0# define KEY1 1# define KEY2 2# define KEY3 3
# define LED9 3# define LED8 2# define LED7 1# define LED6 0
volatile alt_u32 tmp_data = 0;
int main(void)
{
alt_u32 pio_reg = 0;
alt_u32 button = 0;
alt_u32 status = 0;
alt_u8 button_pressed=0;
alt_u8 phase_shift=0;
while(1){
//test
pio_reg |= (1<<LED6);
IOWR_32DIRECT(PIO_LEDS_BASE,0,pio_reg);
button = IORD_32DIRECT(PIO_BUTTONS_BASE,0);
if (~(button) & (1<<KEY0)) { //pressed
pio_reg |= (1<<LED7);
IOWR_32DIRECT(PIO_LEDS_BASE,0,pio_reg);
if (phase_shift != 1) { //doing phsft
phase_shift = 1;
IOWR_32DIRECT(PLL_RECONFIG_BASE,MODE_REG,0x1);
IOWR_32DIRECT(PLL_RECONFIG_BASE,DPS_REG,0b1000010000000000001000);//positive shift c1 = 8 shifts
IOWR_32DIRECT(PLL_RECONFIG_BASE,START_REG,0x1);
tmp_data = IORD_32DIRECT(PLL_RECONFIG_BASE,0x0C); // tpm_data = 0 here
tmp_data++; // tmp_data = 1 here
do {
status = IORD_32DIRECT(PLL_RECONFIG_BASE,STATUS_REG);//read status
pio_reg |= (1<<LED9);
IOWR_32DIRECT(PIO_LEDS_BASE,0,pio_reg);
}while(status != 0x01);
pio_reg &= ~(1<<LED9);
IOWR_32DIRECT(PIO_LEDS_BASE,0,pio_reg);
}
} else {
pio_reg &= ~(1<<LED7);
IOWR_32DIRECT(PIO_LEDS_BASE,0,pio_reg);
phase_shift = 0;
}
}
}