Altera DE2 SDRAM Contoller

VHDL is a HDL (Hardware Description Language): it is intended to describe digital circuits which Quartus will eventually synthesize into fpga. Nios is part of these circuits, together with all sopc builder stuff and external logic. Anyway, after the fpga configuration, Nios is actually a 'real' microprocessor, so you are supposed to program it with a sequential language: C, assembler or whatever the dev tools provide. You can't program Nios with VHDL. Although both VHDL and C can virtually be used to perform the same operation, they apply to two different worlds and behave very differently.