Altera_ForumHonored Contributor7 years agoAltera DE2: LVDS bit alignment issue I'm trying to verify whether my FPGA board (Altera DE2) can support LVDS. For this purpose, I set up a simple system to test it, using an ALTLVDS_TX module to output to a GPIO pair, which is then con...Show More
Recent DiscussionsCyclone 10 LP's Extended Industrial partsBidirectional pin USB_RX with a pseudo-differential I/O standard must use the OEIN port of the nodeObsolescence issuesAvalon-ST configuration with Agilex 3 failsCyclone IV E – PLL Power Track Width Recommendation Clarification