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Fdominguez's avatar
Fdominguez
Icon for New Contributor rankNew Contributor
3 years ago

Agilex SGMII bridge on E-Tile

Target: Agilex Tools version: Quartus Pro 21.3 We are trying to implement this diagram found in the “Embedded Peripherals IP User Guide” to convert a HPS EMAC to SGMII interface coming from the ...
Ash_R_Intel's avatar
Ash_R_Intel
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi,

In your original query you enquired about the TSE IP, which does not have a PMA only option.

If you use E-tile XCVR PHY IP at 1Gbps data rate, the PCS and MAC should be implemented in the FPGA fabric. There is no PCS available in this IP.

If using TSE IP, you can use the hard IP for 10G/25G and 100G data rates only.

Hope this clarifies.


Regards