Forum Discussion

LukiLeu's avatar
LukiLeu
Icon for New Contributor rankNew Contributor
1 year ago

Agilex 5 - LUTs

We are trying to build a TDC in an Agilex 5 FPGA by using the carry chain. We are now struggling in getting the LUTs F0-F3 configured correctly. Is it possible to use different equations for F0 and ...
Configuration
Fpga Devkit
KennyT_altera's avatar
KennyT_altera
Icon for Super Contributor rankSuper Contributor
1 year ago

This case will be discuss internally, as it require some feature testing and complication.