Hi,
The Intel® Agilex™ I/O system includes three types of I/O interfaces which includes GPIO interface.
GPIO interface has a feature where it supports LVDS serializer/deserializer (SERDES) through the True Differential Signaling I/Os in the GPIO banks. It can support the SERDES interfaces up to 1.6 Gbps.
You can implement your high-speed LVDS I/O design using the LVDS SERDES Intel® FPGA IP in the Intel® Quartus® Prime software. The software contains tools for you to create and compile your design, and configure your device.
The Intel® Quartus® Prime software allows you to prepare for device migration, set pin assignments, define placement restrictions, setup timing constraints, and customize the LVDS SERDES IP.
Regards,
Aqid