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Altera_Forum
Honored Contributor
14 years agoAddition Sum of Array
Hey @ all, i'm new here and i have some questions about the Sum of an array (VHDL), that contains a lot of 8 bit value's of std_logic_vector. For example i have declared the array as fol...
Altera_Forum
Honored Contributor
14 years agoThank's a lot.
My FPGA is a Spartan 3AN XC3S1400AN which includes a Block RAM. How can i use it? Do i have to create in the Xilinx Core Generator a Block Memory Generator? Or do i need only a Block RAM Controller, because the Block Ram already exists? best regards phot