adding information regarding expected timing in the LPM_ADD_SUB section of the user guide

Hi Nurina,

No, the above comment does not help as it is missing the point. The information that I am suggesting should be included in the documentation is to help an engineer make a decision about the suitability of an IP core for their design. This means that they have NOT yet made a design, using this core, so that they can analyse it using the timing analyser! At the design/concept stage, when one is looking for options, that's when this information could help make a decision. What if there were 2 (or more) alternatives that could be used? Should the engineer have to make 2 (or more) designs using the candidate cores and perform a timing analysis on each one? And should all the engineers, in the whole world, that are considering using this core have to do this for themselves? What a waste of time!

This work should be done ONCE, by Intel, and should be included in the documentation (giving some examples of all the possible combinations, as I have already mentioned). In this way, ALL the engineers, in the whole world, over the entire lifetime of the IP core, will be able to make easier decisions, in less time.

So my request still stands, as in my original entry, above, and I am advised (by the support team) to ask you to be assigned to the case owner of 15012890347.

Thank you for your help.