Altera_Forum
Honored Contributor
Honored ContributorAdd 64byte FIFO to UART Core?
Can i add a 64 byte FIFO in between UART Core and NIOS II?
Forum Discussion
6 Replies
Altera_ForumUART core already has FIFO inside, just select the proper buffer size.
- Altera_Forum
I think you might be referring to the JTAG UART? The standard UART core just has a hardware buffer of 1. TX and RX data registers.
- Altera_Forum
Oh, my bad... Yes, I was thinking about JTAG UART somehow. Anyway, I see no problems adding FIFO to the UART.
- Altera_Forum
I thought there was a uart with fifo somewhere.
Thinks.... It ought to be possible to use a single M9K memory block to implement (say) 32 byte tx and rx buffers for 16 uarts provided the maximum uart byte rate is 32 times less than the system clock (2 clocks cycles for each uart). - Altera_Forum
AFAIK, the DMA component can be used to copy data from a memory buffer to a UART core, without having the CPU write each byte.
- Altera_Forum
Altera doesn't provide a FIFOed UART, but there is one on the wiki, here (http://www.alterawiki.com/wiki/fifoed_avalon_uart).
