ADC Timing Constraints

That doesn't seem to have done it. The TFF in my simplified schematic is actually the LSB of an always-enabled master counter called mc. I tried running the following lines through the Tcl console in Timequest.

set col ]
query_collection -all $col
create_generated_clock -name intl_adc_clk -source  -divide_by 2 $col
create_generated_clock -name adc_clk -source $col 

The query shows that I am getting a collection with a single entry as a result of my get_keepers call, as expected. But it's still telling me that there's no path between adc_clk and the source.

[edit: correction; the ADC_DATA signals do still show on the clock transfers report when reading it all in from an SDC file.]