ADC output from LVDS deserializer.

--- Quote Start ---

you will need your sdc certainly and a word of caution about the way you sample your signaltap, use the same data clock

--- Quote End ---

IIUC, by data clock, you mean the frame clock (slow clock) of LVDS ?

--- Quote Start ---

you need to enter your clock and check the tCO of your ADC device and then use set input constraints accordingly for tSU and tH. see examples

in altera website, timequest design centre

--- Quote End ---

Thank you very much KAZ! i will try according to your advice.!

Michael