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Altera_Forum
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14 years ago

AD5620 DAC interface

Hi all. I would like to ask for help with my problem. I am trying to make an DAC interface (serial) using AD5620BRJZ with MAX7000AE (EPM7256AEQC208-C7). Attached is my code in VHDL and a copy of t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

hello chrigu,

i was able to use your source code as reference. i only changed o_dac_clk into a clock like output. and i was able to have an output in o_dac_sdin the same with the v_data_buf...

thank you very much for the help.

BR

glenn