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Altera_Forum
Honored Contributor
14 years agoAD5620 DAC interface
Hi all. I would like to ask for help with my problem. I am trying to make an DAC interface (serial) using AD5620BRJZ with MAX7000AE (EPM7256AEQC208-C7). Attached is my code in VHDL and a copy of t...
Altera_Forum
Honored Contributor
14 years agoThanks for the reply. Yes, i used the EN input to write data to the shift register. Now that you pointed that out, it confuses me as well. I'll try another way. And, thanks for pointing out the free running counter. I never really thought of that... the frequency of the clock is the same as the global clock which is 20Mhz. i wanted to use PLL to make a slower clock but the device doesn't support it. i wanted to use a counter too but i'm already running out of LABs.