Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

AD5620 DAC interface

Hi all. I would like to ask for help with my problem. I am trying to make an DAC interface (serial) using AD5620BRJZ with MAX7000AE (EPM7256AEQC208-C7). Attached is my code in VHDL and a copy of t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Hi Glenn,

I have my doubts that it will work. For example the en input. You use it as write enable for the input data right? But you use it also as enable for DOUT <= shiftout. This confuses me a bit. In addition, you have a free runing counter. You should reset your counter when you begin to writing the data to the dac. What is the clock frequency?

I recommand you to use ModelSim, this will help you.