Altera_ForumHonored Contributor9 years agoAC coupled LVDS clock input - Stratix V Hello, We are using one of the CLK inputs (not REFCLK) of our 5SGSMD5K2F40I2LN device as an LVDS receiver of a 54MHz clock. Currently our clock is ac coupled to the input (as illustrated be...Show Moremultiple-attachments.zip35 KB
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