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Altera_Forum
Honored Contributor
19 years agoabout ram_2_port ip core
In my project I used the ip core (ram_2_port).I add avalon_tristate_slave for the ram2port in the sopc builer.But I can't write to the ram2port_base.When I write 0x00 to the ram2port_base,it write to...
Altera_Forum
Honored Contributor
19 years agoI don't know the timing request of ram2port.I can't find it at its datasheet.I think the reason that I can't write the data to the first address of ramport is the timing .