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Honored Contributor
Honored Contributorabout ram_2_port ip core
In my project I used the ip core (ram_2_port).I add avalon_tristate_slave for the ram2port in the sopc builer.But I can't write to the ram2port_base.When I write 0x00 to the ram2port_base,it write to...
Altera_ForumHonored Contributor
Honored Contributorthat looks good, but remember, if you are using a 32 bit master to issue the read, it will actuall perform 2 reads to get the 32 bit data, this could be the cause of address 0x2 being driven.
